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J277 1.1.1 Fetch-execute cycle

Part 4 of 6 · J277 1.1 · Systems architecture

How the CPU actually runs a program, taught as the repeating cycle OCR describes as fetch, decode and execute.

Students will:

  • describe what happens at each stage of the cycle
  • explain how the components and registers support each stage
  • distinguish an instruction from the data it uses
  • apply the cycle to an unfamiliar instruction
  • correct the misconceptions examiners see most often

Inside: 7 text sections, 2 multiple-choice activities, 2 completion activities, 6 written answers. 18 marks. Suggested teaching time: 40–55 minutes. 1 diagram.

Includes a teacher guide with suggested sections, timings and common misconceptions.

Series: J277 1.1 · Systems architecture, part 4 of 6.

Shared by Coding PathwayVerified teacher

  • 17 cells
  • About 45 minutes
  • CC BY-SA 4.0
  • Shared 17 Aug 2026
  • Updated 27 Oct 2026

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The whole resource, exactly as a class sees it. Answers and marking are held back.

The fetch-execute cycle

The CPU runs a program by repeatedly obtaining an instruction, interpreting it and carrying it out. These actions are called fetch, decode and execute.

You will connect each action to the CPU components and apply the cycle to a new instruction.

Multiple choice1 mark

Which pair of registers stores addresses?

  • AMDR and accumulator
  • BPC and MAR
  • CMAR and accumulator
  • DPC and MDR

1. Three actions, repeated

StageAction
FetchObtain the next instruction from memory.
DecodeThe CU interprets the instruction and identifies the required action.
ExecuteCarry out the action. The ALU may calculate or compare values.

Not every instruction needs a calculation: an instruction might move data instead. After execution, the cycle repeats.

The repeating fetch-execute cycle Fetch obtains an instruction from memory. Decode interprets it. Execute carries it out. An arrow returns from execute to fetch for the next instruction. FETCH Obtain the instruction DECODE Interpret the instruction EXECUTE Carry out the instruction Repeat for the next instruction
Fill in the blanks3 marks
Answer 1 obtains an instruction from memory. Answer 2 interprets it. Answer 3 carries it out.
  • Execute
  • Decode
  • Fetch
  • Store

2. Fetch: where and what?

The CPU needs both the location of the next instruction and the instruction stored there.

  • PC: holds the address of the next instruction to be fetched.
  • MAR: holds the address being accessed in memory.
  • MDR: holds the instruction transferred from memory.

These roles distinguish an address from its contents. You do not need to memorise every register transfer.

Fill in the blanks3 marks
Give the register names. There is no answer bank. (a) The Answer 1 holds the address of the next instruction to be fetched. (b) The Answer 2 holds the address being accessed in memory. (c) The Answer 3 holds the instruction transferred from memory.

3. Decode is different from execute

Suppose an instruction means add 4 to the total.

  1. The CPU fetches that instruction from memory.
  2. The CU decodes it: the required action is addition using the value 4.
  3. The ALU executes the addition. The accumulator can store the resulting total.

Interpreting what to do is different from doing it. The CU coordinates the process; the ALU performs the arithmetic or logical operation.

Multiple choice1 mark

The CU identifies that the fetched instruction requires a comparison. Which stage is this?

  • AExecute
  • BFetch
  • CDecode

4. Correct two statements

Each statement below contains one incorrect idea. Write a corrected statement in its own answer box.

Written answer1 mark

(a) Correct this statement: 'During fetch, the CPU obtains the next instruction directly from an SSD.'

Students type their answer here.

Written answer1 mark

(b) Correct this statement: 'The accumulator performs an addition during execute.'

Students type their answer here.

5. Apply the cycle

A door controller has an instruction to compare an entered access code with a stored code. Explain the processing using the three stages. The questions describe stages of one instruction, not a detailed register-transfer sequence.

Written answer2 marks

(a) Describe how the instruction is fetched. Include one relevant register role.

Students type their answer here.

Written answer2 marks

(b) Explain what happens when this instruction is decoded.

Students type their answer here.

Written answer2 marks

(c) Explain what happens when this instruction is executed. Include the component that performs the operation and a register that can hold the result.

Students type their answer here.

6. Check from memory

Give actions in your description. Stage names alone do not explain what the CPU does.

Written answer2 marks

Describe what happens during the fetch-execute cycle.

Students type their answer here.