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OCR H446 1.1.2 Multicore and parallel systems

Part 3 of 5 · H446 1.1.2 · Types of processor

OCR H446 1.1.2: Multicore and parallel systems. Students learn to allocate work across cores or processors and explain why dependencies, serial work and bottlenecks limit parallel speed-up.

Students will:

  • allocate tasks across cores or processors
  • analyse dependencies, serial work and bottlenecks
  • compare parallel methods and explain limits to speed-up

Inside: 7 explanation cells, 1 multiple-choice question, 2 fill-in-the-blanks cells and 4 written answers. 42 marks, about 60 to 75 minutes.

Series: H446 1.1.2 · Types of processor, part 3 of 5.

Shared by Coding PathwayVerified teacher

  • 14 cells
  • About 60 minutes
  • CC BY-SA 4.0
  • Shared 31 Aug 2026
  • Updated 3 Sept 2026

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Multicore and parallel systems

A multicore processor provides multiple processing cores. Parallel processing uses multiple processing units at the same time, but useful speed-up depends on what work can run independently and whether the software actually distributes it.

Dependencies decide what can run together

Parallel work is limited by dependencies and available processing units task graph: dependencies decide what can overlap A: prepare datamust finish first B: model region 1independent after AC: model region 2independent after AD: model region 3independent after A E: combine resultswaits for B, C and D With two cores, B/C/D need at least two waves. A and E stay serial. Parallel processing is not pipeliningparallel: work on multiple processing units at the same timepipeline: different instructions overlap across FDE stages

A parallel system may use multiple processors, multiple CPU cores or GPU processing units. The graph shows why core count alone is not a multiplier: serial preparation A and final combination E cannot overlap with all the middle work; three independent middle tasks also need more than one wave on two cores.

Three routes to parallel processing

  • Multiple CPU cores: one processor package contains cores that can execute separate instruction streams; suitable software can split a program or run several programs concurrently.
  • Multiple processors: separate processor packages/units can share a larger system workload, with communication and coordination costs.
  • GPU processing units: many specialised units apply similar operations to many independent data items.

All three require a task or workload that can be divided. Hardware availability does not create independence.

Worked allocation: two-core environmental model

  1. Core 1 performs A while core 2 waits because B, C and D require A's prepared data.
  2. Core 1 runs B while core 2 runs C.
  3. One core runs D; the other cannot start E because E waits for B, C and D.
  4. One core runs E.

The middle stage gains from parallel execution, but serial work, the number of cores, scheduling and the join limit total speed-up. Communication, memory access or I/O can add further bottlenecks.

Do not substitute pipelining

Parallel processing: different tasks/instruction streams execute on multiple processing units at the same time.

Pipelining: different instructions occupy different fetch/decode/execute stages at the same time within a processor pipeline, improving throughput. It does not mean that one core is “the fetch core”, another “the decode core” and a third “the execute core”.

Multiple choice1 mark

Why might four cores fail to make a program four times faster?

  • AEach extra core reduces the instruction set
  • BMulticore processors cannot execute instructions simultaneously
  • CSome work is serial or dependent, and coordination/software/bottlenecks limit overlap
  • DThe GPU automatically replaces all cores
Fill in the blanks4 marks
A multicore processor contains multiple gap 1. Parallel processing needs work that can be gap 2 into sufficiently independent tasks. Dependencies create gap 3. Pipelining instead overlaps different instructions across FDE gap 4.
  • cores
  • split
  • waiting
  • stages
  • storage
Written answer8 marks

Use the A → (B, C, D) → E graph.

  1. Describe a valid schedule on two cores.
  2. Explain why A and E cannot run in parallel with the middle tasks.
  3. State how the middle stage changes when three cores are available.
  4. Explain why the total time still does not fall in direct proportion to the number of cores.

Track dependencies and available processing units; do not assume all five tasks start together.

Students type their answer here.

Written answer8 marks

Explain four reasons why adding cores may produce little improvement for a particular application. Include at least one software reason, one task/dependency reason and one system bottleneck/overhead.

Develop each point rather than naming it.

Students type their answer here.

Apply the model to mixed systems

Use the task-allocation and dependency model to analyse multiple programs and systems that combine different forms of parallel work.

Written answer8 marks

A school server runs backups, report generation and interactive requests at the same time. Explain two multicore benefits and two limitations in this context. Distinguish running different programs from splitting one program into parallel tasks.

Use separate programs/threads, responsiveness/throughput and shared-resource limits.

Students type their answer here.

Written answer9 marks

A scientific workload could use three different forms of parallel processing. For each method below, describe the processing-unit arrangement, give an example of suitable assigned work and state one coordination or suitability condition.

  1. Multiple processors.
  2. Multiple CPU cores.
  3. GPU processing units.

The methods can coexist; do not rank them from fastest to slowest without workload evidence. Each method is worth 3 marks.

Students type their answer here.

Fill in the blanks4 marks
Multicore hardware enables multiple instruction checkpoint gap 1, but software and tasks must expose checkpoint gap 2 work. Dependencies and communication create checkpoint gap 3. Pipeline overlap is a different mechanism for increasing checkpoint gap 4.

Consolidate your understanding

Check that every speed-up claim identifies independent work, available processing units, remaining serial work and any communication or I/O bottleneck.