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OCR H446 1.4.3 Boolean algebra consolidation

Part 10 of 11 · H446 1.4.3 · Boolean algebra

By this point students hold a series of separate techniques for OCR H446 1.4.3, and the examined difficulty shifts to choosing between them. This consolidation worksheet interleaves notation, circuits, truth tables, named laws, Karnaugh maps, adders and flip-flops, and closes with an error clinic built from mistakes OCR assessment repeatedly exposes.

Students will:

  • choose the representation that suits the demand a question is making
  • simplify an expression with named laws in a mixed-topic set of tasks
  • populate and group a Karnaugh map without a nearby worked example to copy
  • identify which logic component fits a described job and justify the choice
  • check finished work against frequently reported errors before handing in

Inside: 5 explanation cells, 2 multiple-choice questions, 3 fill-in-the-blanks cells and 3 written answers. 32 marks, about 55 to 70 minutes.

Series: H446 1.4.3 · Boolean algebra, part 10 of 11.

Shared by Coding PathwayVerified teacher

  • 13 cells
  • About 60 minutes
  • CC BY-SA 4.0
  • Shared 31 Aug 2026
  • Updated 3 Sept 2026

Preview

The whole resource, exactly as a class sees it. Answers and marking are held back.

Boolean algebra consolidation

Complete the sections in order, beginning with closed-book retrieval and then applying the ideas in the integrated contexts. No new required knowledge is introduced.

This retrieval worksheet interleaves the representations and techniques from BA01–BA09. It is designed to reveal which step needs repair before final examination practice.

You should already know: all H446 1.4.3 content. Brief reminders are included, but no new technique is introduced.

Choose the representation before the operation

  • Scenario → define variables and scope each condition.
  • Circuit → name intermediate outputs.
  • Truth table → list all input combinations systematically.
  • Algebra → name and apply a valid law.
  • Karnaugh map → place outputs, group powers of two, retain constants.
  • Sequential circuit → track state at clock edges.
Multiple choice1 mark

Which action best prevents losing brackets when translating a circuit into an expression?

  • AStart with whichever input is labelled A
  • BSimplify every gate immediately
  • CName intermediate gate outputs and begin with the final gate structure
  • DReplace all AND gates with multiplication
Fill in the blanks4 marks
AB¬A ∨ B
00output for row 1
01output for row 2
10output for row 3
11output for row 4
Written answer4 marks

Simplify ¬(A ∧ ¬B). Show and name each law used.

Apply De Morgan, then double negation.

Students type their answer here.

Fill in the blanks8 marks
Complete the three-variable map for outputs 1 when A=1 or B=1 and C=0. Use the Gray-code map model from BA06; entries are vertical here so every response remains visible on a narrow screen. - C=0, AB=00: entry 1 - C=0, AB=01: entry 2 - C=0, AB=11: entry 3 - C=0, AB=10: entry 4 - C=1, AB=00: entry 5 - C=1, AB=01: entry 6 - C=1, AB=11: entry 7 - C=1, AB=10: entry 8
Written answer4 marks

On paper, group the completed map and derive its simplest expression.

Use one group of four and one overlapping pair.

Students type their answer here.

Multiple choice1 mark

Which variable is removed from the four-cell group where A=1?

  • AA only
  • BA and B
  • CNo variables
  • DB and C
Written answer6 marks

For each case, identify the circuit and justify your choice: (i) add two bits with no carry-in; (ii) add two bits and a carry-in; (iii) hold one bit between clock edges.

Name half adder, full adder and D-type flip-flop, then link each to the defining feature.

Students type their answer here.

Error clinic

Before handing in, check four high-frequency errors reported or exposed by OCR assessment:

  1. Did you draw gate symbols rather than a flowchart?
  2. Did De Morgan switch AND/OR as well as negate terms?
  3. Did every Karnaugh group exclude 0s and include edge wrap-around where useful?
  4. In a full adder, did CarryIn feed the second XOR and second AND?

Closed-book checkpoint

Complete the integrated method. Checking is held for teacher review.

Fill in the blanks4 marks
A circuit expression preserves connection order using entry 1. A Karnaugh term keeps variables that remain entry 2 within its group. A full adder differs from a half adder by accepting entry 3. A D-type output changes at the active clock entry 4.

Review your responses

Check every response against its command word and the supplied constraints. Strengthen unsupported answers with accurate method, mechanism, state or contextual consequence before submitting.