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Types of processor consolidation

Begin with closed-book retrieval and apply the processor models without returning to the worked examples.

Apply architecture and workload choices: mobile mapping platform

A mapping organisation needs low-power field terminals, must preserve one legacy desktop application and processes large aerial images plus a dependency-heavy route-planning stage.

Written answer10 marks

Compare CISC and RISC for the field terminal. Compare the same three features for both processor types, apply power or cooling and software compatibility, and reach a recommendation that states an important condition or limitation.

Use the typical characteristics taught earlier. Do not write unrelated lists or claim that one type is always fastest.

Students type their answer here.

Written answer10 marks

Decide which parts of the mapping workflow should use CPU, GPU or a mixed design: independent image transformations, dependency-heavy route decisions and overall coordination. Explain one visible/time consequence for the image work and one GPU limitation.

Large data is not enough; name operation similarity and independence.

Students type their answer here.

Multiple choice1 mark

Which claim needs repair?

AA GPU can apply one operation across many independent data items
BA CPU remains useful for varied control work
CA mixed design can assign different workload sections to different processors
DA large dataset is automatically best processed by a GPU

Check your first application

Before moving to the next context, check that each CISC/RISC comparison discusses the same feature on both sides and states an important condition. Check that the GPU choice follows from the work being performed rather than a device label.

Analyse parallel allocation and limits: flood simulation service

The service validates input, models four independent regions, combines the results and writes a large report to slow network storage. A developer claims eight cores guarantee eight-times speed-up and calls the regional work “pipelining”.

Written answer10 marks

Create a valid high-level schedule for input validation → four independent region models → combine → network write on two cores and four cores. Identify the serial stages and explain why the network write may dominate even after adding cores.

Describe waves of work; exact clock times are not supplied.

Students type their answer here.

Written answer10 marks

Repair the developer's two claims. Distinguish multicore parallel processing from pipelining and give three further limits on useful speed-up.

Include mechanism, not only ‘not always’.

Students type their answer here.

Multiple choice1 mark

Which statement describes pipelining rather than multicore parallel processing?

ADifferent instructions overlap across fetch, decode and execute stages
BIndependent region tasks execute on different cores
CDifferent programs use separate cores
DMany GPU lanes apply one transform to different pixels

Fill in the blanks4 marks

CISC/RISC answers compare the same feature and include an important checkpoint gap 1. GPU work needs similar operations across checkpoint gap 2 data. Multicore speed-up depends on task and software checkpoint gap 3. Pipelining overlaps FDE checkpoint gap 4, not region tasks on cores.

Review your understanding

Check that you can compare the same CISC/RISC feature on both sides, state when a general claim may be limited, choose CPU or GPU from workload structure, allocate only ready tasks to cores, identify remaining serial work and distinguish parallel processing from pipelining. Rework any response based only on a processor label or an unconditional speed claim.